The present invention relates to a carrier recovering circuit for use in a demodulator for a phase-modulated carrier wave and, more particularly to such a carrier recovering circuit having a phase locked loop (PLL) of expanded capture range in which the phase synchronization can be restored.
One of the conventional approaches to the expansion of the capture range of a PLL employs a low-frequency frequency-sweep oscillator having an oscillation frequency dependent on the internal impedance of the loop. Since the impedance of the loop is low under the synchronized state while it is high under the non-synchronized state, the sweep oscillator stops its oscillation under the synchronized state. This is due to the fact that the oscillator constitutes a negative feedback circuit under the synchronized state. In contrast, under the non-synchronized state, the oscillator restores oscillation, which provides a sweep voltage applied to the voltage controlled oscillator constituting the loop. A typical example of a system based on this approach is described in U.S. Pat. No. 2,972,720.
The system of the referenced patent has the advantage of simplicity. However, it involves the problem of the so-called false lock when used for the demodulation of a multi-phase (N-phase, N being equal to or greater than 2) phase-modulated carrier wave. More definitely, the phase locking of the output of the PLL tends to be achieved not only at the desired center frequency f.sub.c (clock frequency) but also at a frequency shifted by f.sub.c /n from the clock frequency f.sub.c (n being an integer), so far as such shifted frequency lies in the capture range. Since the loop impedance is lowered even under such an undesirable false lock state, the oscillation of the frequency-sweep oscillator is stopped, maintaining the phase locked stated at the shifted frequency, thus preventing the accurate demodulation of the incoming phase-modulated carrier wave.
One approach to the prevention of such a false lock may consist of a control, responsive to the noise level within the loop, over the stopping of oscillation at the frequency-sweep oscillator. This approach is based on the fact that a false lock is always accompanied by an increase in the noise level within the loop.
However, it has a weakness attributed to its dependence on the noise level, which is supposed to be distinguishable between the desired locked state and the false locked state. More definitely, under such a situation where there is no appreciable difference in noise level because of frequency band restriction or a delay characteristic of the transmission channel for the signal, a high noise level does not necessarily indicate the false locked state. Thus, the PPL tends to be driven to malfunction when such an approach is relied on.